1. Field of the Invention
This invention relates to an electronic component possessed of connecting projections as input and output terminals and an electronic component connecting structure electrically connected through the medium of the connecting projections.
2. Description of the Related Art
Various packages formed of ceramic, resinous, metallic, and other materials and intended to mount thereon such semiconductor devices as LSI are tending toward larger densification, fuller adaptation for high speed operation, and more thorough heat release in consequence of the steady trend of LSI toward greater integration, higher operating speed, more power consumption, and more extensive conversion of components into chips. Further, the utility of these semiconductors has disseminated to the extent of covering such industrial products as work stations, personal computers, miniature computers, and large computers and such electronic appliances as portable devices, printers, copiers, cameras, television sets, and video sets. Moreover, the semiconductors themselves have been enjoying continuous improvement in quality.
The packages which serve to mount LSI's of high quality and large integration thereon are required to be capable of permitting connection of the LSI's thereto by means of multiple terminals of narrow pitches, allowing amply dense wiring, releasing heat sufficiently, handling high-speed signals, and admitting multiple terminals of narrow pitches for their input and output terminals. Further, the necessity for perfecting a technique which permits packages of high quality satisfying these requirements to be manufactured inexpensively by a simple procedure with high reliability has been finding widespread recognition.
First, as means to connect a package to semiconductor elements with multiple terminals of narrow pitches, the wire bonding method, the TAB method, the flip chip method, and others have been heretofore known. The wire bonding has been undergoing successive automation and has been most widely adopted to date. Since it can be accommodated to packages differing in mode of programming, it is adaptable to the small-lot great-variety manufacture of packages. In terms of the trend toward narrowing pitches, the technique of the latest development permits bonding with pitches of the order of 100 .mu.m.
The TAB method is at an advantage in permitting collective bonding of chips of multiple terminals, rendering the bonded chips fit to be tested, reducing inductance on account of large lead, and promising an effective heat release by a Cu lead as a radiating path for the LSI. Thus, it is used for liquid crystal driver grade IC's and gate arrays. The flip chips are partly used for high-performance computers, LSI testers, work stations, and others. They are at an advantage in reducing the area for packaging and, at the same time, decreasing the parasitic inductance, capacity, etc. due to the lead junction.
For the sake of enabling such connecting techniques as mentioned above to function effectively, the relevant packages likewise require an inner lead part using narrow pitches and multiple terminals. Further, it has become essential that the connection of such packaging boards as substrates for printed circuits to packages similarly require densification (increase in the number of components per chip) by increasing the number of terminals and narrowing the size of pitches. This connection further demands due consideration of electrical characteristics because the packages themselves require to handle high-speed signals owing to the trend of LSI's toward increasing operating speed as mentioned above.
To meet this trend of packages toward increasing number of terminals and decreasing size of pitches, the package structures are now in transition from the conventional pin insertion type to the surface mount type such as QFP (quad flat package). In the package structures of the surface mount type, those which have large numbers of terminals and high speeds of operation include the SM-PGA (surface mount type pin grid array) packages and narrow pitch QFP packages, for example. The surface mount type packages which use pins and leads, however, incur difficulty in further decreasing the size of pitches because they have such pins and leads joined to their packages proper. A hard problem from the viewpoint of process is encountered in decreasing the size of pitches below 1.27 mm in PGA packages and below 0.3 mm in QFP packages, for example. These packages are further at a disadvantage in requiring such works as solder printing and mounting to be carried out at elevated temperatures when components are mounted on substrates for printed circuits and others.
The PGA and the QFP packages which are possessed of pins and leads, when so operated as to handle signals of high speeds, entrain the problem of inducing reflection of the signals owing to the high-frequency characteristics and aggravated delay of the signals owing to the inductance component because the effect of inductance is exalted in the parts of pins and leads. Even when the inductance is decreased as by controlling the characteristic impedance or providing a power source or a ground surface for the purpose of adapting the multilayer wiring structure of a package proper for an operation of a high speed, the degradation of the characteristics in the parts of pins and leads mentioned above is so heavy as to render difficult the adaptation for signals of high speeds.
The BGA (ball grid array) package was proposed for the solution of such problems as mentioned above. At first, it found utility in super computers and other large computers. Recently, it has been finding growing utility in such household products as personal computers and portable implements. The BGA is a package structure which uses connecting projections such as, for example, solder bumps as input and output terminals for a package. Owing to the use of solder bumps which are capable of decreasing the distance of connection, such problems as the reflection, delay, etc. of high-speed signals by the inductance which originate in the pins and the leads mentioned above can be eliminated.
The formation of bumps, in addition to permitting a decrease in the distance of connection, facilitates the increase in number of terminals and the decrease in size of pitches. Thus, the BGA promises as a future LSI package. The success of the bumps in attaining a decrease in the size of pitches and an increase in the number of terminals can be expected to reduce the size of package itself, improve the density of package as on a substrate for a printed circuit, enhance the electrical characteristics by lowering the parasitic capacity, the inductance, the resistance, etc. of a wiring, and improve the high-frequency characteristics owing to the reduction of the size of package. Further, the BGA, having no pins nor leads which are easy to bend, contribute to facilitate the packaging work as compared with that in the SM-PGA package using pitches of 1.27 mm or that in the QFP package using pitches of 0.3 mm.
From the viewpoint of the heat release from a package, the power consumption and the amount of heat to be generated are both on the increase year after year owing to the trend of LSI's toward increasing speeds of operation. The packages themselves, therefore, require a structure and a material which both excel in the ability to release heat. For packages of high radiation, ceramic packages are mainly used. Packages using ceramic materials predominate, though there are packages which use a metallic material in their main bodies and packages which comprise a printed circuit, use a resinous material, and incorporate therein a heat sink for radiation. In the ceramic packages, those which use such a highly conductive material as aluminum nitride (AlN) are utilized as offering particularly low thermal resistance.
The BGA packages using ceramic materials are high-density packages which enjoy high heat release and excellent electrical characteristics and, at the same time, permit an increase in the number of terminals and a decrease in the size of pitches as described above and are expected to find utility as packages for semiconductor devices of heightened speeds of operation and increased degrees of densification. The BGA packages which use ceramic materials, however, are at a disadvantage in respect that, when they are actually mounted as on substrates for printed circuits, the solder parts destined to serve as connecting parts have poor reliability because the thermal expansion coefficient of a ceramic substrate and that of a printed circuit are widely different. The thermal stress which is generated by this difference of thermal expansion is ascribable partly to the thermal hysteresis which occurs in the step of solder reflow during the mounting of the BGA package on a printed circuit and to the change of the ambient temperature during the course of normal use of the BGA package. In any event, owing to the large difference in thermal expansion between the ceramic package and the printed circuit, the stress is concentrated in the connecting parts with solder bumps which have low mechanical strength. This concentration of stress in the connecting parts entrains the problem of inflicting a crack in the connecting parts or fracturing the connecting parts and impairing the reliability of electrical connections and mechanical connections.
Meanwhile, the feasibility of improving the shapes of the connecting parts by solder bumps, namely the shapes the solder bumps assume after they are melted, for the purpose of solving such problems as mentioned above is now being studied. In terms of shape, by imparting the general shape of an hourglass to the connecting parts with solder bumps, the parts in which stress is concentrated can be shifted from the interfaces between the connected parts and the printed circuit to the central portions of the connected parts and the reliability of these connected parts can be consequently exalted.
Since the hourglass shapes of the connected parts are different from the shapes (like spheres or drums) which the connected parts assume when their solder is naturally melted, however, the distances between the opposed surfaces which are being connected must be controlled for the purpose of imparting the shape of an hourglass to all the connected parts. Thus, the feasibility of controlling the distances between the opposed surfaces being connected by having a spacer inserted between a package and a printed circuit preparatorily to the insertion of the package into a reflow furnace for melting the solder is being studied in a certain quarter of the industry. This measure, however, results in impairing the advantage of BGA as a package of high density because the number of input and output terminals is decreased proportionately to the area to be sacrificed for the insertion of the spacer. Moreover, the spacer serves solely as a heat spreader for transmitting heat to the substrate and plays absolutely no function electrically and disrupts all efforts of cutting the total number of components.
The problems remarked above are not limited to the BGA packages but are encountered by semiconductor devices of flip chip structures possessed of solder bumps as input and output terminals and surface-mounted products similarly using plural semiconductor devices in the form of modules. The connection of the input and the output terminal of a semiconductor device to a package or a printed circuit has been heretofore implemented predominantly by the wire bonding as already described above. This connection is becoming increasingly difficult because the capillary of wire bonding increases in proportion as the pad pitches of the semiconductor devices decrease. Further, the resultant addition to the length of connection augments the inductance to the extent of intolerably degrading the electrical characteristics. As a means to decrease this unduly large inductance, the use of bumps in packaging a semiconductor device has a bright prospect. This approach, however, incurs the same problem as the BGA package made of a ceramic material on account of a large difference in thermal expansion between the semiconductor device and a printed circuit.
In the electronic components which are possessed of connecting projections (bumps) as input and output terminals for the conventional BGA packages made of ceramic materials and the semiconductor elements of flip chip structures, when they succumb to the thermal hysteresis due to a change in the ambient temperature at the step of reflow soldering during the packaging of such an electronic component as on a printed circuit or during the course of actual use of the electronic component, the difference in thermal expansion between the ceramic package or semiconductor and the printed circuit gives rise to stress or strain in the connecting parts with solder bumps. The stress or strain brings about the problem of causing the connected parts to sustain fracture due to thermal fatigue, inflicting a fracture by stress on the ceramic package or semiconductor element itself, and degrading the reliability of connection.